• General
• Design Styles
  • Cellular arrays and automata
  • Combinational logic
  • Logic arrays
  • Memory control and access
  • Memory used as logic
  • Parallel circuits
  • Sequential circuits
• Reliability, Testing and Fault-Tolerance
  • Built-in tests
  • Error-checking
  • Redundant design
  • Test generation
  • Testability
• Design Aids
  • Automatic synthesis
  • Hardware description languages
  • Optimization
  • Simulation
  • Switching theory
  • Verification
• Miscellaneous

• General
• Types and Desgin Styles
  • Advanced technologies
  • Algoritms implemented in hardware
  • Gate arrays
  • Input/output circuits
  • Memory technologies
  • Microprocessors and microcomputers
  • Standard cells
  • VLSI
• Design Aids
  • Graphics
  • Layout
  • Placement and routing
  • Simulation
  • Verification
• Reliability and Testing
  • Built-in tests
  • Error-checking
  • Redundant design
  • Test generation
  • Testability
• Miscellaneous

• General
• Reliability, Testing and Fault-Tolerance
• Performance Analysis and Design
• Miscellaneous

• • Register-Transfer-Level Implementation
    • General
    • Design
      • Arithmetic and logic units
      • Control design
      • Data-path design
      • Memory Design
      • Styles (e.g. parallel, pipeline, special-purpose)
    • Design Aids
      • Automatic synthesis
      • Hardware design languages
      • Optimization
      • Simulation
      • Verification
    • Reliability, Testing and Fault-Tolerance
      • Built-in tests
      • Error-checking
      • Redundant design
      • Test generation
      • Testability
    • Miscellaneous

• • • Security requirements

• Storage
  • Latency
  • Bandwidth
  • Cycle time

• • Registers
    • • Accumulator
      • Program Counter
      • Instruction Register
      • Stack Pointer
      • Memory Buffer Register
      • Memory Address Register
      • Interrupt bits (register)
      • Processor Status Word
      • General Purpose Registers

• • • Characteristics

• • • Levels
      • L0
      • L1
      • L2
  • RAM
    • DIMM
    • DRAM
    • SDRAM

• • ROM
    • EPROM
    • EEPROM

• • External Storage
    • Connection
      • Directly connected
      • Off line
      • Networked
      • RAID architectures
    • Magnetic
      • Tape
      • Disk
        • RAID
        • SMART Technology
    • Optical
      • CD-ROM
      • DVD
    • Flash drive
    • Electronic
      • Smart cards
      • Mobile phones
      • MP3 players
    • Network Storage
    • Other External Storage

• Input - Output and Data Communications

• • • • Analog to Digital Converters
      • Digital to Analog Converters

• • • • Other sensors

• • • Control devices
    • Other output devices
  • Data communications

• • Interconnections (Subsystems)
    • Asynchronous/synchronous operation
    • Fiber optics
    • Interfaces
    • Parallel I/O
    • Topology (e.g. bus, point-to-point)
    • Radio

Computer Hardware Organization

• • Combinational Circuits
    • Multiplexers
    • Decoders
    • Encoders

• • Feedback Circuits
    • counters
    • adders
    • flip-flops
    • registers

• • Design Considerations
    • layout
    • placement
    • routing
    • VLSI

• • • race conditions

• • Binary data
    • Encrypted
    • Compressed
    • Compiled code

• • • standards

• • • formats
      • font
      • color
      • size
      • style

• • • raster
    • pixels

• • • • standards

• • • String

• • • Error correcting/dectecting codes

• • • • Multi Core Processsor

• • Special Purpose processors
    • Graphics processor
    • Games processor
    • Other special purpose processors

• • • Compiler requirements
    • Multimedia application connections

• • • Moore's law

• • • TLB (Translation lookaside buffer)

• Logic expressions
  • Transformation
    • minimization
    • normal forms

• Electronic circuits
  • logic gates
  • flip-flops,
  • counters,
  • registers,
  • PLA
  • switching
  • concurrency
  • constraints
    • delay
    • fanout
    • heat
  • features
    • speed

• • Design Considerations
    • layout
    • placement
    • routing
    • VLSI
• Hardware Language
  • Register transfer notation
    • functional considerations
  • Hardware description languages (e.g. VHDL)

• Storage units
  • Bits
  • Bytes
  • Words
• Information Representation
  • Size
    • Range
    • Precision
    • Accuracy
  • Numeric
    • Integer
      • Twos complement
      • Sign magnitude
      • Ones complement
    • Non Integer
      • Fixed point
      • Floating point * IEEE standard
  • Character
    • ASCII
    • UNICODE
    • EBCDIC
  • Graphical
    • vector
  • Multimedia
    • sound
    • video
    • image
      • jpg
      • tiff
      • gif
  • Complex data
    • Record (struc)
    • Array
    • Multiple precision
  • Pointer (aka address)
  • Programs
    • Instruction
      • Format

• • • • Instruction types
        • data manipulation
        • control
          • sequential
          • loop
          • decision (if)
          • subroutine call
          • parallel
          • interrupt
        • input/output

• • Encoding standards
    • Compression
    • Integrity
      • Error correcting codes
        • parity
        • Hamming code
      • Fault handling

• Design Structure
  • vonNeumann
  • Processor Count
    • Single Processor
    • Multi Processor
      • Dual Core Processsor * Embedded system

• Central Processing Unit
  • Processor system design

• • • Instruction Set Architecture
      • Complex Instruction Set Computer (CISC)
      • Reduced Instrucion Set Computer (RISC)
      • Very Large Instruction Word (VLIW)
      • Short vector instruction sets
    • Influence on Compiler requirements
    • architecture - multimedia application connections
      • Streaming extensions
  • Performance
    • Pipeline
      • Hazards * Structural * Data * Data Control
    • Superscalar architecture
    • Multithreading
    • Scalability

• • Storage * Registers
    • • Accumulator
      • Program Counter
      • Instruction Register
      • Stack Pointer
      • Memory Buffer Register
      • Memory Address Register
      • Interrupt bits (register)
      • Processor Status Word
      • General Purpose Registers
    • L0 Cache
  • Control Unit
    • Design Considerations
      • Microprogramming
      • Hard wiring
    • Operation
      • Machine Cycle
        • Fetch Instruction
        • Decode
        • Fetch operands
        • Execute
        • Write result
  • Arithmetic - Logic Unit
    • Design Considerations
      • Performance
    • Functional Units
      • Adders
        • Half Adders
        • Full Adders
        • Fast Adders
      • Multipliers
      • Logic Unit (aka Boolean Unit)
      • Floating Point Unit
        • Algorithms
        • Implemenation
        • Standards
• Data path
  • Bus
    • Single
    • Multiple
    • Protocols * Arbitration

• Memory
  • Technology
    • latency
    • cycle time
    • bandwidth
    • DIMM
    • DRAM
    • SDRAM
    • EPROM
    • EEPROM
  • Organization
    • Interleaving
    • Cache
      • Address mapping
      • Block size / line size
      • Replacement policy
      • Store policy
      • write-back policies
      • write through policies
      • Performance
        • Branch prediction
        • Prefetching
        • Speculative execution
  • Reliability
    • error detection
    • error correction
  • Virtual Memory
    • Segmentation
    • Page table
    • TLB (TABLE LOOKAHEAD BUFFER??)

• Input - Output
  • Performance
    • fault detection
  • Interface / Communication
    • Handshaking
    • Buffering
      • Double buffering
    • Programmed
    • Interrupt driven
      • Interrupt structures
      • Interrupt controlers
      • vectored interrupt structures
      • prioritized interrupts
      • overhead
      • reentrant code
    • Direct Memory Access
    • Device Drivers
  • Secondary Storage
    • Connection
      • Directly connected
      • Off line
      • Networked
      • RAID architectures
    • Technology
      • Electronic
      • Magnetic
      • Optical
      • Flash
      • SMART technology
  • Input Devices
    • Keyboard
    • Mouse
    • Voice Input device
    • Data gathering devices
      • Temperature Probe
      • Geographical Positioning System
      • Biometric
    • SMART card reader
    • Graphic tablet
    • Camera
  • Output Devices
    • Printer
    • Monitor/Display
    • Speaker
    • Alarm

Computer Arithmetic

• Algorithms for common arithmetic operations (addition, subtraction, multiplication, division)
• Algorithms for carrying out common floating-point operations
• Converting between integer and real numbers
• The generation of higher order functions from square roots to transcendental functions

MERGED with NETWORKS and DISTRIBUTED SYSTEMS

• Implementation of instructions

• Instruction sets
• Instruction types (data manipulation, control, I/O)
• Instruction set design

• Memory module design

• • Interrupt controlers

Computer Hardware Architecture and Organization

From CE volume 11-11-05

• Organization of the von Neumann machine
• Instruction formats
• The fetch/execute cycle; instruction decoding and execution
• Registers and register files
• Instruction types and addressing modes
• Subroutine call and return mechanisms
• Programming in assembly language
• I/O techniques and interrupts

• Representation of integers (positive and negative numbers)
• Algorithms for common arithmetic operations (addition, subtraction, multiplication, division)
• Significance of range, precision, and accuracy in computer arithmetic
• Representation of real numbers (standards for floating-point arithmetic)
• Algorithms for carrying out common floating-point operations
• Converting between integer and real numbers
• Multi-precision arithmetic
• Hardware and software implementation of arithmetic unit
• The generation of higher order functions from square roots to transcendental functions

• Memory systems hierarchy
• Coding, data compression, and data integrity
• Electronic, magnetic and optical technologies
• Main memory organization
  • Characteristics
  • Performance
• Latency, cycle time, bandwidth, interleaving
• Cache memories
  • address mapping
  • line size
  • replacement policies
  • write-back policies
  • write through policies
• Virtual memory (virtual storage) systems
• Memory technologies
  • DRAM
  • EPROM
  • EEPROM
  • Flash
• Reliability
  • • error detecting
    • error correcting

• I/O fundamentals
  • handshaking
  • buffering
• I/O techniques
  • programmed I/O
  • interrupt-driven I/O
  • Direct Memory Access (DMA)
• Interrupt structures
  • vectored interrupt structures
  • prioritized interrupts
  • overhead
  • reentrant code
• Memory system design and interfacing
• Buses
  • Bus protocols
  • arbitration

• External storage systems
  • disk drives
  • optical memory
• I/O controllers
  • keyboard
  • mouse
  • printer
• RAID architectures
• Video control
• I/O Performance
• SMART technology
  • fault detection

• CPU interface
  • clock
  • control
  • data bus
  • address bus
• Address decoding
• Memory interfacing
• Interfaces
  • parallel
  • serial
• Timers
• System firmware

• Implementation of the von Neumann machine
• Bus datapaths
  • single
  • multiple
• Instruction set architecture
• Architecture - compiler relationship
• Implmentation of instructions
• Control unit
  • hardware implementation
  • microprogrammed implementation
• Arithmetic and Logic Unit
• Instruction pipelining
• Architecture trends
  • CISC
  • RISC
  • VLIW (very large instructions word)
• Instruction-level parallelism
• Pipeline hazards
  • structural
  • data
  • control

• Metrics
  • clock rate
  • MIPS
  • Cycles per instruction
  • benchmarks
  • strengths & weaknesses
  • averaging
    • arithmetic
    • geometric
    • harmonic
• Amdahl's law

• Classification
  • parallel machine models
    • SIMD
    • MIMD
    • SISD
    • MISD
  • Flynn's taxonomy
  • Handler's clasification
  • message passing
• Granularity, levels of parallelism
• multiprocessors and multi-computers
  • topology
  • tightly coupled architectures
  • loosely coupled architectures
• Processes
  • threads
  • clients
  • servers
  • code migration
  • software agents
• Clocks
  • Physical clocks
  • Logical clocks
  • synchronization algorithms
  • Lamport timestamps
  • vector timestamps
• Election algorithms
  • Link to Algorithms & Complexity
• Mutual Exclusion algorithms
  • Link to Algorithms & Complexity
• Distributed transactions
  • models
  • classification
  • concurrency control

• Superscalar architecture
• Branch prediction
• Prefetching
• Speculative execution
• Multithreading
• Scalability
• Short vector instruction sets
  • Streaming extensions
  • AltiVec^?
  • architecture - multimedia application connections

• Basics of electronic circuits
• Fundamental building blocks (logic gates, flip-flops, counters, registers, PLA)
  • Functional characteristics (switching, concurrency)
  • Electronic (and other technologies) features and constraints (delays, fanout)
• Logic expressions, minimization, normal forms
• Register transfer notation - functional considerations

• Hardware description languages (e.g. VHDL)
• Integrated circuits
• Layout, placement and routing
• Electronic design of digital systems (e.g. towards VLSI design)

• Bits, bytes, and words
• Numeric data representation and number bases
• Fixed- and floating-point systems
• Signed and twos-complement representations
• Representation of nonnumeric data (character codes, graphical data)
• Multimedia data (sound, photographs, video)
• Representation of records and arrays

• Basic organization of the von Neumann machine
• Control unit; instruction fetch, decode, and execution
• Instruction sets and types (data manipulation, control, I/O)
• Assembly/machine language programming
• Instruction formats
• Addressing modes
• Subroutine call and return mechanisms
• I/O and interrupts

• Half adders, full adders fast adders
• Boolean operations
• Floating-point arithmetic - standards and algorithms
• Floating point arithmetic - implementation
• Design of ALU (including high performance considerations)
• Design of control units
• Input / output considerations ( buses and I/o control)
• Dual core processors

• Coding, data compression, and data integrity
• Memory hierarchy
• Main memory organization and operations
• Latency, cycle time, bandwidth, and interleaving
• Cache memories (address mapping, block size, replacement and store policy)
• Virtual memory (segmentation, page table, TLB)
• Error correcting codes (e.g. parity, Hamming codes)
• Fault handling and reliability

• Monitors and displays (including interaction capability)
• Storage devices (discs, memory sticks, etc.)
• Graphical devices ( including image processing)
• Input devices such as digital cameras
• Location aware devices (e.g. GPS)
• People
• Embedded systems

• Implementation of simple datapaths
• Control unit: hardwired realization vs. microprogrammed realization
• Instruction pipelining
• Instruction-level parallelism (ILP)